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Packet processing
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#	Item
31	P4FPGA: High Level Synthesis for Networking Han Wang, Ki Suh Lee, Vishal Shrivastav, Hakim Weatherspoon Cornell University 1 Introduction Add to Reading List Source URL: conferences.sigcomm.org Language: English - Date: 2016-08-02 16:10:05 Computer networking P4 Field-programmable gate array Packet processing Hardware description language Xilinx Network interface controller Domain-specific language Verilog
32	Università della Svizzera italiana USI Technical Report Series in Informatics Add to Reading List Source URL: perso.uclouvain.be Language: English - Date: 2015-12-08 15:32:49 Fault-tolerant computer systems Paxos P4 Consensus Forwarding plane Replication Communications protocol Packet processing Software-defined networking OpenFlow Virtual synchrony
33	Deep Packet Inspection as a Service Anat Bremler-Barr Yotam Harchol School of Computer Science Add to Reading List Source URL: conferences2.sigcomm.org Language: English - Date: 2014-12-01 16:57:13 Computer network security Deep packet inspection Net neutrality Networking hardware Internet in China Middlebox Dots per inch Network intelligence Packet processing DPI Software-defined networking
34	Technical Report UCAM-CL-TR-578 ISSNNumber 578 Add to Reading List Source URL: rich.recoil.org Language: English - Date: 2006-04-13 14:58:02 Computer networking Packet processing Procedural programming languages Network processor Transmission Control Protocol ALGOL 68
35	Lagopus FPGA - a reprogrammable data plane for high-performance software SDN switches K. Yamazaki, Y. Nakajima†, T. Hatano and A. Miyazaki* NTT Device Innovation Center, NTT Corporation, †NTT Network Innovation La Add to Reading List Source URL: www.hotchips.org Language: English* - Date: 2015-08-21 02:18:29 Network architecture Computer networking Emerging technologies Ethernet Data Plane Development Kit Software-defined networking Network function virtualization OpenFlow Field-programmable gate array Open vSwitch Packet processing Multi-core processor
36	IsoStack – Highly Efficient Network Processing on Dedicated Cores Leah Shalev, Julian Satran, Eran Borovik, Muli Ben-Yehuda , , , IBM Research – Add to Reading List Source URL: www.mulix.org Language: English - Date: 2016-06-16 09:04:39 Computing Networking hardware Berkeley sockets Network interface controller TCP offload engine Transmission Control Protocol Packet processing Opteron Large segment offload Network socket Large receive offload Throughput
37	Thank you for choosing IdenTrust as your TrustID Certificate vendor! The forms packet for the TrustID Business certificate is used to gather ID-specific details, necessary for the processing and ultimate approval of your Add to Reading List Source URL: www.identrust.com Language: English - Date: 2016-05-19 18:52:40 Notary Act Form Seal Email Notary public
38	Source-Based Path Selection: The Data Plane Perspective Taeho Lee†∗ , Christos Pappas†∗, Cristina Basescu† , Jun Han§ , Torsten Hoefler† , Adrian Perrig† † ETH Zürich {kthlee, pappasch, cba, htor, adria Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2015-07-18 07:57:35 Computing Network architecture Routing Internet Computer networking Ethernet Forwarding plane Forwarding information base Packet processing Source routing Packet forwarding Router
39	IX: A Protected Dataplane Operating System for High Throughput and Low Latency Adam Belay1 George Prekas2 Christos Kozyrakis1 Add to Reading List Source URL: www.scs.stanford.edu Language: English - Date: 2016-01-02 20:09:14 Networking hardware Ethernet Computer networking Network interface controller Latency Packet processing Transmission Control Protocol Thread Data Plane Development Kit Scheduling Linux kernel Firewall
40	Energy Proportionality and Workload Consolidation for Latency-critical Applications George Prekas1 , Mia Primorac1 , Adam Belay2 , Christos Kozyrakis2 , Edouard Bugnion1 1 EPFL Abstract Add to Reading List Source URL: www.scs.stanford.edu Language: English - Date: 2016-01-02 20:09:14 Parallel computing Computer performance Energy proportional computing Network performance Scheduling Throughput Speedup Latency Multi-core processor Hyper-threading Forwarding plane Packet processing